This is the documentation for the latest (main) development branch of HPM SDK. If you are looking for the documentation of previous releases, use the drop-down menu on the left and select the desired version.

15.1. Console Coremark Demo

15.1.1. Overview

Multi-core Console coremark example project runs the “coremark” example on core0 and core1.

In this project:

  • The multi-core coremark will run automatically when the demo starts to run, and the dual-core coremark result will be printed out to the console

  • The application accept next request to run this demo again if detecting any inputs from the console UART.

15.1.2. Board Setting

BOOT_PIN should be configured to 0-OFF, 1-OFF

15.1.3. Generate and Build Multi-core projects

In this project, the core0 application runs in FLASH while the core1 application runs in its own ILM

core0 project must be generated first, as a link project, core1 project will be generated automatically.

core0 project must be built after the core1 project has been built successfully.

15.1.3.1. Generate core0 project

CMAKE_BUILD_TYPE forced to be “debug”, and users don’t need to care.

15.1.4. Running the example

  • Download the core0 example to the target, dis-connect the debugger probe and reset the board

When the project runs successfully, it will print out the following result:

----------------------------------------------------------------------
$$\   $$\ $$$$$$$\  $$\      $$\ $$\
$$ |  $$ |$$  __$$\ $$$\    $$$ |\__|
$$ |  $$ |$$ |  $$ |$$$$\  $$$$ |$$\  $$$$$$$\  $$$$$$\   $$$$$$\
$$$$$$$$ |$$$$$$$  |$$\$$\$$ $$ |$$ |$$  _____|$$  __$$\ $$  __$$\
$$  __$$ |$$  ____/ $$ \$$$  $$ |$$ |$$ /      $$ |  \__|$$ /  $$ |
$$ |  $$ |$$ |      $$ |\$  /$$ |$$ |$$ |      $$ |      $$ |  $$ |
$$ |  $$ |$$ |      $$ | \_/ $$ |$$ |\$$$$$$$\ $$ |      \$$$$$$  |
\__|  \__|\__|      \__|     \__|\__| \_______|\__|       \______/
----------------------------------------------------------------------
Dual-core Coremark example


Copying secondary core image to destination memory...
Starting secondary core...
Run Coremark on Core1...

Run Coremark on Core0...

------------------------------------------------------
|                                                    |
|          Core0 CoreMark Info:                      |
|                                                    |
------------------------------------------------------
2K performance run parameters for coremark.
CoreMark Size    : 666
Total ticks      : 371867026
Total time (secs): 15.494459
Iterations/Sec   : 3872.351941
Iterations       : 60000
Compiler version : GCC11.1.0
Compiler flags   : -Wall -Wno-format -fomit-frame-pointer -fno-builtin -ffunction-sections -fdata-sections -mabi=ilp32 -march=rv32imac -g -O3 -funroll-all-loops -finline-limit=600 -ftree-dominator-optsg
Memory location  : STACK
seedcrc          : 0xe9f5
[0]crclist       : 0xe714
[0]crcmatrix     : 0x1fd7
[0]crcstate      : 0x8e3a
[0]crcfinal      : 0xbd59
Correct operation validated. See README.md for run and reporting rules.
CoreMark 1.0 : 3872.351941 / GCC11.1.0 -Wall -Wno-format -fomit-frame-pointer -fno-builtin -ffunction-sections -fdata-sections -mabi=ilp32 -march=rv32imac -g -O3 -funroll-all-loops -finline-limit=600 -K



------------------------------------------------------
|                                                    |
|               Core1 CoreMark Info:                 |
|                                                    |
------------------------------------------------------
2K performance run parameters for coremark.
CoreMark Size    : 666
Total ticks      : 15608229
Total time (secs): 15.608229
Iterations/Sec   : 3844.126070
Iterations       : 60000
Compiler version : GCC11.1.0
Compiler flags   : -Wall -Wno-format -fomit-frame-pointer -fno-builtin -ffunction-sections -fdata-sections -mabi=ilp32 -march=rv32imac -g -O3 -funroll-all-loops -finline-limit=600 -ftree-dominator-optsg
Memory location  : STACK
seedcrc          : 0xe9f5
[0]crclist       : 0xe714
[0]crcmatrix     : 0x1fd7
[0]crcstate      : 0x8e3a
[0]crcfinal      : 0xbd59
Correct operation validated. See README.md for run and reporting rules.
CoreMark 1.0 : 3844.126070 / GCC11.1.0 -Wall -Wno-format -fomit-frame-pointer -fno-builtin -ffunction-sections -fdata-sections -mabi=ilp32 -march=rv32imac -g -O3 -funroll-all-loops -finline-limit=600 -K



Press any key to start a new round of coremark test

Users can re-run the dual-core coremark test by press any keys